Implemented new 8 instructions, tested the hell out of them...
This commit is contained in:
xolatile
@ -4,23 +4,27 @@
|
|||||||
#include "../source/assembler.h"
|
#include "../source/assembler.h"
|
||||||
#include "../source/assembler.c"
|
#include "../source/assembler.c"
|
||||||
|
|
||||||
|
static unsigned int array [29] = {
|
||||||
|
ADC, D64, REG, R1, REG, R2,
|
||||||
|
ADC, D32, REG, R1, MEM, 12,
|
||||||
|
ADC, D16, MEM, 12, REG, R10,
|
||||||
|
ADC, D8, REG, R3, IMM, 0X77,
|
||||||
|
INC, D16, REG, R0, LOCK
|
||||||
|
};
|
||||||
|
|
||||||
int main (void) {
|
int main (void) {
|
||||||
unsigned int index;
|
unsigned int index;
|
||||||
|
token_array = malloc (144UL * sizeof (* token_array));
|
||||||
|
|
||||||
output_array = malloc (144UL * sizeof (* output_array));
|
assemble (29, array);
|
||||||
|
|
||||||
build_regular (ADC, D64, REG, R1, REG, R2);
|
printf ("> %u\n", token_count);
|
||||||
build_regular (ADC, D32, REG, R1, MEM, 12);
|
|
||||||
build_regular (ADC, D16, MEM, 12, REG, R10);
|
|
||||||
build_regular (ADC, D8, REG, R3, IMM, 0X77);
|
|
||||||
build_special_1 (LOCK);
|
|
||||||
build_special_2 (PAUSE);
|
|
||||||
|
|
||||||
for (index = 0; index < output_count; ++index) {
|
for (index = 0; index < token_count; ++index) {
|
||||||
printf ("%02X \n", output_array [index]);
|
printf ("%02X \n", token_array [index]);
|
||||||
}
|
}
|
||||||
|
|
||||||
free (output_array);
|
free (token_array);
|
||||||
|
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|||||||
@ -212,21 +212,24 @@ entry $
|
|||||||
nop
|
nop
|
||||||
|
|
||||||
nop
|
nop
|
||||||
adc rcx, rdx; 48 31 D1
|
adc rcx, rdx;
|
||||||
nop
|
nop
|
||||||
adc ecx, [x4]; 33 0D 14 10 00 00
|
adc ecx, [x4];
|
||||||
nop
|
nop
|
||||||
adc [x2], r10w; 66 44 31 15 09 10 00 00
|
adc [x2], r10w;
|
||||||
nop
|
nop
|
||||||
adc bl, 077h; 80 F3 77
|
adc bl, 077h;
|
||||||
;~assemble (ADC, D64, REG, R1, REG, R2);
|
nop
|
||||||
;~assemble (ADC, D32, REG, R1, MEM, 12);
|
inc ax
|
||||||
;~assemble (ADC, D16, MEM, 12, REG, R10);
|
nop
|
||||||
;~assemble (ADC, D8, REG, R3, IMM, 0X77);
|
lock
|
||||||
|
|
||||||
;~48 11 D1
|
;~48 11 D1
|
||||||
;~13 0D 14 10 00 00
|
;~13 0D 1B 10 00 00
|
||||||
;~66 44 11 15 09 10 00 00
|
;~66 44 11 15 10 10 00 00
|
||||||
;~80 D3 77
|
;~80 D3 77
|
||||||
|
;~66 FF C0
|
||||||
|
|
||||||
;~48
|
;~48
|
||||||
;~11
|
;~11
|
||||||
;~D1
|
;~D1
|
||||||
@ -238,7 +241,122 @@ entry $
|
|||||||
;~15
|
;~15
|
||||||
;~80
|
;~80
|
||||||
;~D3
|
;~D3
|
||||||
|
;~66
|
||||||
|
;~FF
|
||||||
|
;~C0
|
||||||
|
;~F0
|
||||||
|
|
||||||
|
; 48 11 D1
|
||||||
|
; 13 0D 1D 10 00 00
|
||||||
|
; 66 44 11 15 12 10 00 00
|
||||||
|
; 80 D3 77
|
||||||
|
; 66 FF C0
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~jmp qword[x4]
|
||||||
|
;~nop
|
||||||
|
;~jmp qword[x8]
|
||||||
|
;~nop
|
||||||
|
;~jmp rax
|
||||||
|
;~nop
|
||||||
|
;~jmp rcx
|
||||||
|
;~nop
|
||||||
|
;~jmp rdx
|
||||||
|
;~nop
|
||||||
|
;~jmp rbx
|
||||||
|
;~nop
|
||||||
|
;~jmp r8
|
||||||
|
;~nop
|
||||||
|
;~jmp r9
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~inc rax
|
||||||
|
;~nop
|
||||||
|
;~inc eax
|
||||||
|
;~nop
|
||||||
|
;~inc ax
|
||||||
|
;~nop
|
||||||
|
;~inc al
|
||||||
|
;~nop
|
||||||
|
;~inc qword[x8]
|
||||||
|
;~nop
|
||||||
|
;~inc dword[x4]
|
||||||
|
;~nop
|
||||||
|
;~inc word[x2]
|
||||||
|
;~nop
|
||||||
|
;~inc byte[x1]
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~idiv rax
|
||||||
|
;~nop
|
||||||
|
;~idiv eax
|
||||||
|
;~nop
|
||||||
|
;~idiv ax
|
||||||
|
;~nop
|
||||||
|
;~idiv al
|
||||||
|
;~nop
|
||||||
|
;~idiv qword[x8]
|
||||||
|
;~nop
|
||||||
|
;~idiv dword[x4]
|
||||||
|
;~nop
|
||||||
|
;~idiv word[x2]
|
||||||
|
;~nop
|
||||||
|
;~idiv byte[x1]
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
;~nop
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~inc word[x2]
|
||||||
|
;~nop
|
||||||
|
;~dec word[x2]
|
||||||
|
;~nop
|
||||||
|
;~not word[x2]
|
||||||
|
;~nop
|
||||||
|
;~neg word[x2]
|
||||||
|
;~nop
|
||||||
|
;~mul word[x2]
|
||||||
|
;~nop
|
||||||
|
;~imul word[x2]
|
||||||
|
;~nop
|
||||||
|
;~div word[x2]
|
||||||
|
;~nop
|
||||||
|
;~idiv word[x2]
|
||||||
|
|
||||||
|
;~nop
|
||||||
|
;~inc ax
|
||||||
|
;~nop
|
||||||
|
;~dec cx
|
||||||
|
;~nop
|
||||||
|
;~not dx
|
||||||
|
;~nop
|
||||||
|
;~neg bx
|
||||||
|
;~nop
|
||||||
|
;~mul cx
|
||||||
|
;~nop
|
||||||
|
;~imul cx
|
||||||
|
;~nop
|
||||||
|
;~div cx
|
||||||
|
;~nop
|
||||||
|
;~idiv cx
|
||||||
|
|
||||||
|
nop
|
||||||
|
|
||||||
|
nop
|
||||||
|
nop
|
||||||
nop
|
nop
|
||||||
|
|
||||||
nop
|
nop
|
||||||
|
|||||||
@ -19,28 +19,25 @@ splint assembler.h:
|
|||||||
-- no warnings at all.
|
-- no warnings at all.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define REGULAR_START (ADD)
|
#define REGULAR_BEGIN (ADD)
|
||||||
#define REGULAR_COUNT (UMUL - REGULAR_START)
|
#define REGULAR_END (CMP)
|
||||||
#define IRREGULAR_START (UMUL)
|
#define IRREGULAR_BEGIN (INC)
|
||||||
#define IRREGULAR_COUNT (NOP - IRREGULAR_START)
|
#define IRREGULAR_END (IDIV)
|
||||||
#define SPECIAL_1_START (NOP)
|
#define SPECIAL_1_BEGIN (NOP)
|
||||||
#define SPECIAL_1_COUNT (SYSENTER - SPECIAL_1_START)
|
#define SPECIAL_1_END (HLT)
|
||||||
#define SPECIAL_2_START (SYSENTER)
|
#define SPECIAL_2_BEGIN (SYSENTER)
|
||||||
#define SPECIAL_2_COUNT (ENTER - SPECIAL_2_START)
|
#define SPECIAL_2_END (CPUID)
|
||||||
|
|
||||||
typedef signed int form;
|
#define REGULAR_COUNT (REGULAR_END - REGULAR_BEGIN + 1)
|
||||||
typedef unsigned int next;
|
#define IRREGULAR_COUNT (IRREGULAR_END - IRREGULAR_BEGIN + 1)
|
||||||
typedef unsigned char byte;
|
#define SPECIAL_1_COUNT (SPECIAL_1_END - SPECIAL_1_BEGIN + 1)
|
||||||
|
#define SPECIAL_2_COUNT (SPECIAL_2_END - SPECIAL_2_BEGIN + 1)
|
||||||
|
|
||||||
static next input_count; /* SHOULD I EXPOSE THESE? */
|
static void place (form when,
|
||||||
static form * input_array;
|
byte data) {
|
||||||
static next output_count;
|
token_array [token_count] = data;
|
||||||
static byte * output_array;
|
|
||||||
|
|
||||||
static void place (form when, byte data) {
|
token_count += (next) when;
|
||||||
output_array [output_count] = data;
|
|
||||||
|
|
||||||
output_count += (next) when;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static form valid (form data) { return ((data >= 0) && (data <= 15)); }
|
static form valid (form data) { return ((data >= 0) && (data <= 15)); }
|
||||||
@ -51,16 +48,14 @@ static void build_short_prefix (form when) {
|
|||||||
place (when, 0X66);
|
place (when, 0X66);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void build_long_prefix (form when,
|
static void build_long_prefix (form use_big_registers,
|
||||||
size_index size,
|
form use_new_destination,
|
||||||
type_index to,
|
form use_new_source) {
|
||||||
form destination,
|
place (use_big_registers || use_new_destination || use_new_source,
|
||||||
type_index from,
|
(byte) (0X40
|
||||||
form source) {
|
+ 0X01 * use_new_destination
|
||||||
place (when, (byte) (0X40
|
+ 0X04 * use_new_source
|
||||||
+ 0X01 * ((to == REG) && (upper (destination)))
|
+ 0X08 * use_big_registers));
|
||||||
+ 0X04 * ((from == REG) && (upper (source)))
|
|
||||||
+ 0X08 * (size == D64)));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void build_register_direction (form when,
|
static void build_register_direction (form when,
|
||||||
@ -79,20 +74,6 @@ static void build_constant (form when,
|
|||||||
place (when, (byte) (0X80 + 0X01 * (size != D8)));
|
place (when, (byte) (0X80 + 0X01 * (size != D8)));
|
||||||
}
|
}
|
||||||
|
|
||||||
static void build_regular_instruction (form when,
|
|
||||||
byte code,
|
|
||||||
size_index size,
|
|
||||||
type_index to,
|
|
||||||
form destination,
|
|
||||||
type_index from) {
|
|
||||||
place (when, (byte) (code
|
|
||||||
+ destination % 8 * ((to == REG) && (from == IMM))
|
|
||||||
+ 0X01 * (size != D8)
|
|
||||||
+ 0X02 * ((from == MEM) && (to == REG))
|
|
||||||
+ 0X04 * ((from == IMM) && (to == MEM))
|
|
||||||
+ 0XC0 * ((from == IMM) && (to == REG))));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void build_regular (operation_index operation,
|
static void build_regular (operation_index operation,
|
||||||
size_index size,
|
size_index size,
|
||||||
type_index to,
|
type_index to,
|
||||||
@ -101,15 +82,18 @@ static void build_regular (operation_index operation,
|
|||||||
form source) {
|
form source) {
|
||||||
build_short_prefix (size == D16);
|
build_short_prefix (size == D16);
|
||||||
|
|
||||||
build_long_prefix ((size == D64)
|
build_long_prefix (size == D64,
|
||||||
|| ((to == REG) && (upper (destination)))
|
(to == REG) && (upper (destination)),
|
||||||
|| ((from == REG) && (upper (source))),
|
(from == REG) && (upper (source))); //////////////////
|
||||||
size, to, destination, from, source);
|
|
||||||
|
|
||||||
build_constant (from == IMM, size);
|
build_constant (from == IMM, size);
|
||||||
|
|
||||||
build_regular_instruction (1, (byte) (0X08 * operation),
|
place (1, (byte) (0X08 * (operation - REGULAR_BEGIN)
|
||||||
size, to, destination, from);
|
+ destination % 8 * ((to == REG) && (from == IMM))
|
||||||
|
+ 0X01 * (size != D8)
|
||||||
|
+ 0X02 * ((from == MEM) && (to == REG))///////////////////////////
|
||||||
|
+ 0X04 * ((from == IMM) && (to == MEM))///////////////////////////
|
||||||
|
+ 0XC0 * ((from == IMM) && (to == REG))));////////////////////////
|
||||||
|
|
||||||
build_register_direction ((to == REG) && (from == REG),
|
build_register_direction ((to == REG) && (from == REG),
|
||||||
destination, source);
|
destination, source);
|
||||||
@ -118,12 +102,33 @@ static void build_regular (operation_index operation,
|
|||||||
build_register_redirection ((to == MEM) && (from == REG), source);
|
build_register_redirection ((to == MEM) && (from == REG), source);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void build_irregular (operation_index operation,
|
||||||
|
size_index size,
|
||||||
|
type_index to,
|
||||||
|
form destination) {
|
||||||
|
build_short_prefix (size == D16);
|
||||||
|
|
||||||
|
build_long_prefix (size == D64,
|
||||||
|
(to == REG) && (upper (destination)), 0);
|
||||||
|
|
||||||
|
place (1, (byte) (0XF6
|
||||||
|
+ 0X08 * ((operation == INC) || (operation == DEC))
|
||||||
|
+ 0X01 * (size != D8)));
|
||||||
|
|
||||||
|
place (to == REG, (byte) (0XC0
|
||||||
|
+ 0X08 * (operation - IRREGULAR_BEGIN))
|
||||||
|
+ 0X01 * (destination % 8));
|
||||||
|
|
||||||
|
place (to == MEM, (byte) (0X05
|
||||||
|
+ 0X08 * (operation - IRREGULAR_BEGIN)));
|
||||||
|
}
|
||||||
|
|
||||||
static void build_special_1 (operation_index operation) {
|
static void build_special_1 (operation_index operation) {
|
||||||
const byte data [1 * SPECIAL_1_COUNT] = {
|
const byte data [1 * SPECIAL_1_COUNT] = {
|
||||||
0X90, 0XC3, 0XCB, 0XC9, 0XF0, 0XF4
|
0X90, 0XC3, 0XCB, 0XC9, 0XF0, 0XF4
|
||||||
};
|
};
|
||||||
|
|
||||||
place (1, data [operation - SPECIAL_1_START]);
|
place (1, data [operation - SPECIAL_1_BEGIN]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void build_special_2 (operation_index operation) {
|
static void build_special_2 (operation_index operation) {
|
||||||
@ -132,6 +137,36 @@ static void build_special_2 (operation_index operation) {
|
|||||||
0X34, 0X35, 0X05, 0X07, 0X90, 0XA2
|
0X34, 0X35, 0X05, 0X07, 0X90, 0XA2
|
||||||
};
|
};
|
||||||
|
|
||||||
place (1, data [operation - SPECIAL_2_START]);
|
place (1, data [operation - SPECIAL_2_BEGIN]);
|
||||||
place (1, data [operation - SPECIAL_2_START + SPECIAL_2_COUNT]);
|
place (1, data [operation - SPECIAL_2_BEGIN + SPECIAL_2_COUNT]);
|
||||||
|
}
|
||||||
|
|
||||||
|
next token_count;
|
||||||
|
byte * token_array;
|
||||||
|
|
||||||
|
void assemble (next count, next * array) {
|
||||||
|
next index;
|
||||||
|
|
||||||
|
for (index = 0; index < count; ++index) {
|
||||||
|
if ((array [index] >= REGULAR_BEGIN)
|
||||||
|
&& (array [index] <= REGULAR_END)) {
|
||||||
|
build_regular (array [index + 0], array [index + 1],
|
||||||
|
array [index + 2], (form) array [index + 3],
|
||||||
|
array [index + 4], (form) array [index + 5]);
|
||||||
|
index += 5;
|
||||||
|
} else if ((array [index] >= IRREGULAR_BEGIN)
|
||||||
|
&& (array [index] <= IRREGULAR_END)) {
|
||||||
|
build_irregular (array [index + 0], array [index + 1],
|
||||||
|
array [index + 2], (form) array [index + 3]);
|
||||||
|
index += 3;
|
||||||
|
} else if ((array [index] >= SPECIAL_1_BEGIN)
|
||||||
|
&& (array [index] <= SPECIAL_1_END)) {
|
||||||
|
build_special_1 (array [index + 0]);
|
||||||
|
index += 0;
|
||||||
|
} else if ((array [index] >= SPECIAL_2_BEGIN)
|
||||||
|
&& (array [index] <= SPECIAL_2_END)) {
|
||||||
|
build_special_2 (array [index + 0]);
|
||||||
|
index += 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -1,6 +1,10 @@
|
|||||||
#ifndef ASSEMBLER_H
|
#ifndef ASSEMBLER_H
|
||||||
#define ASSEMBLER_H
|
#define ASSEMBLER_H
|
||||||
|
|
||||||
|
typedef signed int form;
|
||||||
|
typedef unsigned int next;
|
||||||
|
typedef unsigned char byte;
|
||||||
|
|
||||||
typedef enum {
|
typedef enum {
|
||||||
D64, D32, D16, D8,
|
D64, D32, D16, D8,
|
||||||
} size_index;
|
} size_index;
|
||||||
@ -12,8 +16,8 @@ typedef enum {
|
|||||||
typedef enum {
|
typedef enum {
|
||||||
ADD, OR, ADC, SBB,
|
ADD, OR, ADC, SBB,
|
||||||
AND, SUB, XOR, CMP,
|
AND, SUB, XOR, CMP,
|
||||||
UMUL, UDIV, IMUL, IDIV,
|
|
||||||
INC, DEC, NOT, NEG,
|
INC, DEC, NOT, NEG,
|
||||||
|
UMUL, IMUL, UDIV, IDIV,
|
||||||
NOP, RETN, RETF, LEAVE,
|
NOP, RETN, RETF, LEAVE,
|
||||||
LOCK, HLT,
|
LOCK, HLT,
|
||||||
SYSENTER, SYSEXIT, SYSCALL, SYSRET,
|
SYSENTER, SYSEXIT, SYSCALL, SYSRET,
|
||||||
@ -45,4 +49,9 @@ typedef enum {
|
|||||||
R12, R13, R14, R15,
|
R12, R13, R14, R15,
|
||||||
} operand_index;
|
} operand_index;
|
||||||
|
|
||||||
|
extern next token_count;
|
||||||
|
extern byte * token_array;
|
||||||
|
|
||||||
|
extern void assemble (next count, next * array);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
Reference in New Issue
Block a user