211 lines
7.1 KiB
C
211 lines
7.1 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include "../source/assembler.h"
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#include "../source/assembler.c"
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static unsigned int array [] = {
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NOP, ADD, D64, REG, R1, REG, R9,
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NOP, ADD, D64, REG, R1, MEM, 0,
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NOP, ADD, D64, REG, R1, IMM, 0X11223344,
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NOP, ADD, D64, MEM, 0, REG, R1,
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NOP, ADD, D64, MEM, 0, IMM, 0X11223344,
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NOP, OR, D32, REG, R1, REG, R9,
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NOP, OR, D32, REG, R1, MEM, 0,
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NOP, OR, D32, REG, R1, IMM, 0X11223344,
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NOP, OR, D32, MEM, 0, REG, R1,
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NOP, OR, D32, MEM, 0, IMM, 0X11223344,
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NOP, ADC, D16, REG, R1, REG, R9,
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NOP, ADC, D16, REG, R1, MEM, 0,
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NOP, ADC, D16, REG, R1, IMM, 0X1122,
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NOP, ADC, D16, MEM, 0, REG, R1,
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NOP, ADC, D16, MEM, 0, IMM, 0X1122,
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NOP, SBB, D8, REG, R1, REG, R9,
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NOP, SBB, D8, REG, R1, MEM, 0,
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NOP, SBB, D8, REG, R1, IMM, 0X11,
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NOP, SBB, D8, MEM, 0, REG, R1,
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NOP, SBB, D8, MEM, 0, IMM, 0X11,
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NOP, AND, D64, REG, R1, REG, R9,
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NOP, AND, D64, REG, R1, MEM, 0,
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NOP, AND, D64, REG, R1, IMM, 0X11223344,
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NOP, AND, D64, MEM, 0, REG, R1,
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NOP, AND, D64, MEM, 0, IMM, 0X11223344,
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NOP, SUB, D32, REG, R1, REG, R9,
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NOP, SUB, D32, REG, R1, MEM, 0,
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NOP, SUB, D32, REG, R1, IMM, 0X11223344,
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NOP, SUB, D32, MEM, 0, REG, R1,
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NOP, SUB, D32, MEM, 0, IMM, 0X11223344,
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NOP, XOR, D16, REG, R1, REG, R9,
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NOP, XOR, D16, REG, R1, MEM, 0,
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NOP, XOR, D16, REG, R1, IMM, 0X1122,
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NOP, XOR, D16, MEM, 0, REG, R1,
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NOP, XOR, D16, MEM, 0, IMM, 0X1122,
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NOP, CMP, D8, REG, R1, REG, R9,
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NOP, CMP, D8, REG, R1, MEM, 0,
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NOP, CMP, D8, REG, R1, IMM, 0X11,
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NOP, CMP, D8, MEM, 0, REG, R1,
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NOP, CMP, D8, MEM, 0, IMM, 0X11,
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//~NOP, D32, INC, REG, R1,
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//~NOP, D32, INC, MEM, 0,
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//~NOP, D32, DEC, REG, R1,
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//~NOP, D32, DEC, MEM, 0,
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//~NOP, D32, NOT, REG, R1,
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//~NOP, D32, NOT, MEM, 0,
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//~NOP, D32, NEG, REG, R1,
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//~NOP, D32, NEG, MEM, 0,
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//~NOP, D32, UMUL, REG, R9,
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//~NOP, D32, UMUL, MEM, 0,
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//~NOP, D32, IMUL, REG, R9,
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//~NOP, D32, IMUL, MEM, 0,
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//~NOP, D32, UDIV, REG, R9,
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//~NOP, D32, UDIV, MEM, 0,
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//~NOP, D32, IDIV, REG, R9,
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//~NOP, D32, IDIV, MEM, 0,
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//~NOP, RETN,
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//~NOP, RETF,
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//~NOP, LEAVE,
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//~NOP, LOCK,
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//~NOP, HLT,
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//~NOP, SYSENTER,
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//~NOP, SYSEXIT,
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//~NOP, SYSCALL,
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//~NOP, SYSRET,
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//~NOP, PAUSE,
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//~NOP, CPUID,
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//~NOP, JO, 0X77FFFFFF,
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//~NOP, JNO, 0X77FFFFFF,
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//~NOP, JB, 0X77FFFFFF,
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//~NOP, JAE, 0X77FFFFFF,
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//~NOP, JE, 0X77FFFFFF,
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//~NOP, JNE, 0X77FFFFFF,
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//~NOP, JBE, 0X77FFFFFF,
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//~NOP, JA, 0X77FFFFFF,
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//~NOP, JS, 0X77FFFFFF,
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//~NOP, JNS, 0X77FFFFFF,
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//~NOP, JPE, 0X77FFFFFF,
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//~NOP, JPO, 0X77FFFFFF,
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//~NOP, JL, 0X77FFFFFF,
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//~NOP, JGE, 0X77FFFFFF,
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//~NOP, JLE, 0X77FFFFFF,
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//~NOP, JG, 0X77FFFFFF,
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//~NOP, CMOVO, D64, REG, R0, REG, R1,
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//~NOP, CMOVNO,D64, REG, R0, REG, R1,
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//~NOP, CMOVB, D64, REG, R0, REG, R1,
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//~NOP, CMOVAE, D64, REG, R0, REG, R1,
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//~NOP, CMOVE, D64, REG, R0, REG, R1,
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//~NOP, CMOVNE, D64, REG, R0, REG, R1,
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//~NOP, CMOVBE, D32, REG, R0, REG, R1,
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//~NOP, CMOVA, D32, REG, R0, REG, R1,
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//~NOP, CMOVS, D32, REG, R0, REG, R1,
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//~NOP, CMOVNS, D32, REG, R0, REG, R1,
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//~NOP, CMOVPE, D32, REG, R0, REG, R1,
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//~NOP, CMOVPO, D32, REG, R0, REG, R1,
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//~NOP, CMOVL, D32, REG, R0, REG, R1,
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//~NOP, CMOVGE, D32, REG, R0, REG, R1,
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//~NOP, CMOVLE, D16, REG, R0, REG, R1,
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//~NOP, CMOVG, D16, REG, R0, REG, R1
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};
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int main (void) {
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unsigned int index;
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token_array = malloc (1440UL * sizeof (* token_array));
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assemble ((unsigned int) (sizeof (array) / sizeof (array [0])), array);
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printf ("> %u\n", token_count);
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for (index = 0; index < token_count; ++index) {
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printf ("%02X ", token_array [index]);
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}
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free (token_array);
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return (0);
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}
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/*
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XOLATILE: FLAT:
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4C 01 C9 4C 01 C9
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48 03 0D FF FF FF FF 48 03 0D 52 12 00 00
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48 81 C2 44 33 22 11 48 81 C1 44 33 22 11 add rcx 0X11223344 -1
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48 01 0D FF FF FF FF 48 01 0D 42 12 00 00
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48 81 05 FF FF FF FF 44 33 22 11 48 81 05 36 12 00 00 44 33 22 11
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44 09 C9 44 09 C9
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0B 0D FF FF FF FF 0B 0D 27 12 00 00
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81 CA 44 33 22 11 81 C9 44 33 22 11 or ecx 0X11223344 -2
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09 0D FF FF FF FF 09 0D 19 12 00 00
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81 0D FF FF FF FF 44 33 22 11 81 0D 0E 12 00 00 44 33 22 11
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66 44 11 C9 66 44 11 C9
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66 13 0D FF FF FF FF 66 13 0D FF 11 00 00
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66 81 D2 22 11 66 81 D1 22 11 adc cx 0X1122 -1
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66 11 0D FF FF FF FF 66 11 0D F1 11 00 00
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66 81 15 FF FF FF FF 22 11 66 81 15 E7 11 00 00 22 11
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44 18 C9 44 18 C9
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1A 0D FF FF FF FF 1A 0D DB 11 00 00
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80 D9 11 80 D9 11
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18 0D FF FF FF FF 18 0D D0 11 00 00
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80 1C FF FF FF FF 11 80 1D C8 11 00 00 11 sbb [1] 0X11 +1
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4C 21 C9 4C 21 C9
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48 23 0D FF FF FF FF 48 23 0D C3 11 00 00
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48 81 E2 44 33 22 11 48 81 E1 44 33 22 11 and rcx 0X11223344 -1
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48 21 0D FF FF FF FF 48 21 0D B3 11 00 00
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48 81 25 FF FF FF FF 44 33 22 11 48 81 25 A7 11 00 00 44 33 22 11
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44 29 C9 44 29 C9
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2B 0D FF FF FF FF 2B 0D 98 11 00 00
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81 EA 44 33 22 11 81 E9 44 33 22 11 sub ecx 0X11223344 -2
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29 0D FF FF FF FF 29 0D 8A 11 00 00
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81 2D FF FF FF FF 44 33 22 11 81 2D 7F 11 00 00 44 33 22 11
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66 44 31 C9 66 44 31 C9
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66 33 0D FF FF FF FF 66 33 0D 70 11 00 00
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66 81 F2 22 11 66 81 F1 22 11 xor cx 0X1122 -1
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66 31 0D FF FF FF FF 66 31 0D 62 11 00 00
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66 81 35 FF FF FF FF 22 11 66 81 35 58 11 00 00 22 11
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44 38 C9 44 38 C9
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3A 0D FF FF FF FF 3A 0D 4C 11 00 00
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80 F9 11 80 F9 11
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38 0D FF FF FF FF 38 0D 41 11 00 00
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80 3C FF FF FF FF 11 ****************************************
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FASM:
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90 4C 01 C9
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90 48 03 0D 52 12 00 00
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90 48 81 C1 44 33 22 11
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90 48 01 0D 42 12 00 00
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90 48 81 05 36 12 00 00 44 33 22 11
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90 44 09 C9
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90 0B 0D 27 12 00 00
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90 81 C9 44 33 22 11
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90 09 0D 19 12 00 00
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90 81 0D 0E 12 00 00 44 33 22 11
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90 66 44 11 C9
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90 66 13 0D FF 11 00 00
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90 66 81 D1 22 11
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90 66 11 0D F1 11 00 00
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90 66 81 15 E7 11 00 00 22 11
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90 44 18 C9
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90 1A 0D DB 11 00 00
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90 80 D9 11
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90 18 0D D0 11 00 00
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90 80 1D C8 11 00 00 11
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90 4C 21 C9
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90 48 23 0D C3 11 00 00
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90 48 81 E1 44 33 22 11
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90 48 21 0D B3 11 00 00
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90 48 81 25 A7 11 00 00 44 33 22 11
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90 44 29 C9
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90 2B 0D 98 11 00 00
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90 81 E9 44 33 22 11
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90 29 0D 8A 11 00 00
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90 81 2D 7F 11 00 00 44 33 22 11
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90 66 44 31 C9
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90 66 33 0D 70 11 00 00
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90 66 81 F1 22 11
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90 66 31 0D 62 11 00 00
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90 66 81 35 58 11 00 00 22 11
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90 44 38 C9
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90 3A 0D 4C 11 00 00
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90 80 F9 11
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90 38 0D 41 11 00 00
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*/
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