Sanity work in progress, do not compile it...
This commit is contained in:
@ -87,30 +87,33 @@ static int near (unsigned int label) {
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return (label && 0);
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return (label && 0);
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}
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}
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static void build_short_prefix (int when) {
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static void short_prefix (unsigned int size) {
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input (when, 0x66);
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input (size == D16, 0x66);
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}
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}
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static void build_long_prefix (unsigned int registers, unsigned int to, unsigned int from) {
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static void long_prefix (unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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input (registers || to || from, 0x40 + 0x01 * to + 0x04 * from + 0x08 * registers);
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int to_upper = (to == REG) && (upper (destination));
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int from_upper = (to == REG) && (upper (destination));
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input ((size == D64) || (to_upper) || (from_upper), 0x40 + 0x01 * to_upper + 0x04 * from_upper + 0x08 * (size == D64));
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}
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}
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static void build_co (int when, unsigned int destination, unsigned int source) {
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static void modify_registers (unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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input (when, 0xc0 + 0x01 * (destination & 0x07) + 0x08 * (source & 0x07));
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input ((to == REG) && (from == REG), 0xc0 + 0x01 * (destination & 0x07) + 0x08 * (source & 0x07));
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}
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}
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static void build_at (int when, unsigned int direction) {
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static void modify_memory (unsigned int operation, unsigned int to, unsigned int from) {
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input (when, 0x05 + 0x08 * (direction & 0x07));
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input (((to == MEM) && (from == REG)) || ((to == REG) && (from == MEM)), 0x05 + 0x08 * operation * ((to == MEM) && (from == IMM)));
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}
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}
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static void build_constant (int when, unsigned int size) {
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static void modify_register_0 (unsigned int size) {
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input (when, 0x80 + 0x01 * (size != D8));
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input (! ((to == REG) && (destination == 0)) && (from == IMM), 0x80 + 0x01 * (size != D8));
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}
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}
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static void build_regular (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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static void build_regular (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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build_short_prefix (size == D16);
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short_prefix (size);
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build_long_prefix (size == D64, (to == REG) && (upper (destination)), (from == REG) && (upper (source)));
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long_prefix (size, to, destination, from, source);
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input ((size == D8) && (to == REG)
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input ((size == D8) && (to == REG)
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&& ((from == REG) || (from == IMM))
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&& ((from == REG) || (from == IMM))
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@ -121,7 +124,7 @@ static void build_regular (unsigned int operation, unsigned int size, unsigned i
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input ((from == IMM) && (to == REG) && (destination == 0), 0x05 + 0x08 * (operation & 0x07) - 0x01 * (size == D8));
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input ((from == IMM) && (to == REG) && (destination == 0), 0x05 + 0x08 * (operation & 0x07) - 0x01 * (size == D8));
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build_constant ((from == IMM) && ! ((to == REG) && (destination == 0)), size);
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modify_register_0 (size);
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input (! ((from == IMM) && (to == REG) && (destination == 0)),
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input (! ((from == IMM) && (to == REG) && (destination == 0)),
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(destination & 0x07) * ((to == REG) && (from == IMM))
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(destination & 0x07) * ((to == REG) && (from == IMM))
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@ -133,10 +136,10 @@ static void build_regular (unsigned int operation, unsigned int size, unsigned i
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+ 0x04 * ((to == MEM) && (from == IMM))
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+ 0x04 * ((to == MEM) && (from == IMM))
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+ 0xc0 * ((to == REG) && (from == IMM)));
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+ 0xc0 * ((to == REG) && (from == IMM)));
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build_co ((to == REG) && (from == REG), destination, source);
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modify_registers (to, destination, from, source);
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build_at ((to == REG) && (from == MEM), destination);
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modify_memory ((to == REG) && (from == MEM), destination);
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build_at ((to == MEM) && (from == REG), source);
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modify_memory ((to == MEM) && (from == REG), source);
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input_by ((to == REG) && (from == MEM), D32, ~0x0u);
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input_by ((to == REG) && (from == MEM), D32, ~0x0u);
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input_by ((to == REG) && (from == IMM), size, source);
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input_by ((to == REG) && (from == IMM), size, source);
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@ -146,9 +149,9 @@ static void build_regular (unsigned int operation, unsigned int size, unsigned i
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}
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}
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static void build_irregular (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination) {
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static void build_irregular (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination) {
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build_short_prefix (size == D16);
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short_prefix (size);
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build_long_prefix (size == D64, (to == REG) && (upper (destination)), 0);
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long_prefix (size, to, destination, 0, 0);
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input ((size == D8) && (to == REG) && front (destination), 0x40);
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input ((size == D8) && (to == REG) && front (destination), 0x40);
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@ -187,15 +190,15 @@ static void build_jump_if (unsigned int operation, unsigned int size, unsigned i
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}
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}
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static void build_move_if (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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static void build_move_if (unsigned int operation, unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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build_short_prefix (size == D16);
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short_prefix (size);
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build_long_prefix (size == D64, (to == REG) && (upper (destination)), (from == REG) && (upper (source)));
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long_prefix (size, to, destination, from, source);
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input (1, 0x0f);
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input (1, 0x0f);
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input (1, 0x40 + operation - MOVE_IF_BEGIN);
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input (1, 0x40 + operation - MOVE_IF_BEGIN);
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build_co ((to == REG) && (from == REG), destination, source);
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modify_registers (to, destination, from, source);
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build_at ((to == REG) && (from == MEM), destination);
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modify_memory ((to == REG) && (from == MEM), destination);
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}
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}
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static void build_jump (unsigned int size, unsigned int to, unsigned int destination) {
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static void build_jump (unsigned int size, unsigned int to, unsigned int destination) {
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@ -212,18 +215,18 @@ static void build_jump (unsigned int size, unsigned int to, unsigned int destina
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}
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}
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static void build_move (unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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static void build_move (unsigned int size, unsigned int to, unsigned int destination, unsigned int from, unsigned int source) {
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build_short_prefix (size == D16);
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short_prefix (size);
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build_long_prefix (size == D64, (to == REG) && (upper (destination)), (from == REG) && (upper (source)));
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long_prefix (size, to, destination, from, source);
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input ((to == REG) && (from == REG), 0x88 + 0x01 * (size != D8));
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input ((to == REG) && (from == REG), 0x88 + 0x01 * (size != D8));
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input ((to == REG) && (from == MEM), 0x8a + 0x01 * (size != D8));
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input ((to == REG) && (from == MEM), 0x8a + 0x01 * (size != D8));
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input ((to == MEM) && (from == REG), 0x88 + 0x01 * (size != D8));
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input ((to == MEM) && (from == REG), 0x88 + 0x01 * (size != D8));
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build_at ((to == REG) && (from == MEM), destination);
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modify_memory ((to == REG) && (from == MEM), destination);
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build_at ((to == MEM) && (from == REG), source);
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modify_memory ((to == MEM) && (from == REG), source);
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build_co ((to == REG) && (from == REG), destination, source);
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modify_registers (to, destination, from, source);
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input ((to == REG) && ((from == IMM) || (from == REL)), 0xb8 + 0x01 * (destination & 0x07));
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input ((to == REG) && ((from == IMM) || (from == REL)), 0xb8 + 0x01 * (destination & 0x07));
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@ -259,7 +262,7 @@ static void build_enter (unsigned int dynamic_storage, unsigned int nesting_leve
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}
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}
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static void build_in_out (unsigned int move, unsigned int size, unsigned int type, unsigned int port) {
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static void build_in_out (unsigned int move, unsigned int size, unsigned int type, unsigned int port) {
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build_short_prefix (size == D16);
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short_prefix (size);
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input (1, 0xe4 + 0x01 * (size != D8) + 0x02 * (move != OUT) + 0x08 * (type == REG));
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input (1, 0xe4 + 0x01 * (size != D8) + 0x02 * (move != OUT) + 0x08 * (type == REG));
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@ -267,7 +270,7 @@ static void build_in_out (unsigned int move, unsigned int size, unsigned int typ
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}
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}
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static void build_pop (unsigned int size, unsigned int to, unsigned int destination) {
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static void build_pop (unsigned int size, unsigned int to, unsigned int destination) {
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build_short_prefix (size == D16);
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short_prefix (size);
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input ((to == REG) && (upper (destination)), 0x41);
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input ((to == REG) && (upper (destination)), 0x41);
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@ -279,7 +282,7 @@ static void build_pop (unsigned int size, unsigned int to, unsigned int destinat
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}
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}
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static void build_push (unsigned int size, unsigned int from, unsigned int source) {
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static void build_push (unsigned int size, unsigned int from, unsigned int source) {
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build_short_prefix (size == D16);
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short_prefix (size);
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input ((from == REG) && (upper (source)), 0x41);
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input ((from == REG) && (upper (source)), 0x41);
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@ -295,7 +298,7 @@ static void build_push (unsigned int size, unsigned int from, unsigned int sourc
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static void build_float (unsigned int operation, unsigned int size, unsigned int from, unsigned int source) {
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static void build_float (unsigned int operation, unsigned int size, unsigned int from, unsigned int source) {
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input (from == MEM, 0xd8 + 0x04 * (size == D64));
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input (from == MEM, 0xd8 + 0x04 * (size == D64));
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build_at (from == MEM, operation);
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modify_memory (from == MEM, operation);
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input_at (from == MEM, size, source, 0);
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input_at (from == MEM, size, source, 0);
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}
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}
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@ -2,226 +2,36 @@
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#define ASSEMBLER_H
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#define ASSEMBLER_H
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enum {
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enum {
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D8,
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D8, D16, D32, D64
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D16,
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D32,
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D64
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};
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};
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enum {
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enum {
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REL,
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REL, REG, MEM, IMM
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REG,
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MEM,
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IMM
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};
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};
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enum {
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enum {
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ASMDIRMEM,
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ASMDIRMEM, ASMDIRREL, ASMDIRIMM, ASMDIRREP,
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ASMDIRREL,
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ADD, OR, ADC, SBB, AND, SUB, XOR, CMP,
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ASMDIRIMM,
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INC, DEC, NOT, NEG, MUL, IMUL, DIV, IDIV,
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ASMDIRREP,
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FADD, FMUL, FCOM, FCOMP, FSUB, FSUBR, FDIV, FDIVR,
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ADD,
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NOP, RETN, RETF, LEAVE, POPF, PUSHF,
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OR,
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SYSCALL, CPUID, FNOP, FCHS, FABS, FTST, FXAM, FLD1,
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ADC,
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FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, FLDZ, F2XM1, FYL2X,
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SBB,
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FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM, FYL2XP1,
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AND,
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FSQRT, FSINCOS, FRNDINT, FSCALE, FSIN, FCOS,
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SUB,
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ENTER, CALL, IN, OUT, JMP, MOV, POP, PUSH,
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XOR,
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JO, JNO, JB, JAE, JE, JNE, JBE, JA,
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CMP,
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JS, JNS, JPE, JPO, JL, JGE, JLE, JG,
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INC,
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CMOVO, CMOVNO, CMOVB, CMOVAE, CMOVE, CMOVNE, CMOVBE, CMOVA,
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DEC,
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CMOVS, CMOVNS, CMOVPE, CMOVPO, CMOVL, CMOVGE, CMOVLE, CMOVG,
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NOT,
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BSWAP, TEST, XCHG, LEA, BSF, BSR,
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NEG,
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RCL, RCR, ROL, ROR, SHL, SHR, SAL, SAR,
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MUL,
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REP, REPE, REPNE, REPZ, REPNZ, LOOP, LOOPE, LOOPNE
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IMUL,
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DIV,
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IDIV,
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NOP,
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RETN,
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RETF,
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LEAVE,
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LOCK,
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HLT,
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POPF,
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PUSHF,
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WAIT,
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CLC,
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CLD,
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CLI,
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STC,
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STD,
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STI,
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CMC,
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INSB,
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INSD,
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OUTSB,
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OUTSD,
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CDQ,
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CWDE,
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INAL,
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INEAX,
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INT3,
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IRETD,
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LODSB,
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LODSD,
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OUTAL,
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OUTEAX,
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SCASB,
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SCASD,
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STOSB,
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STOSD,
|
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SYSENTER,
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SYSEXIT,
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SYSCALL,
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SYSRET,
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|
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PAUSE,
|
|
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CPUID,
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|
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EMMS,
|
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RSM,
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FNOP,
|
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FCHS,
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|
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FABS,
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|
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FTST,
|
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FXAM,
|
|
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FLD1,
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|
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FLDL2T,
|
|
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FLDL2E,
|
|
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FLDPI,
|
|
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FLDLG2,
|
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FLDLN2,
|
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FLDZ,
|
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F2XM1,
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FYL2X,
|
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FPTAN,
|
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FPATAN,
|
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FXTRACT,
|
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FPREM1,
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FDECSTP,
|
|
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FINCSTP,
|
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FPREM,
|
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FYL2XP1,
|
|
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FSQRT,
|
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FSINCOS,
|
|
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FRNDINT,
|
|
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FSCALE,
|
|
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FSIN,
|
|
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FCOS,
|
|
||||||
INSW,
|
|
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OUTSW,
|
|
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CWD,
|
|
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CQO,
|
|
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CBW,
|
|
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CDQE,
|
|
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INVD,
|
|
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WBINVD,
|
|
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UD2,
|
|
||||||
CLTS,
|
|
||||||
INAX,
|
|
||||||
IRETQ,
|
|
||||||
LODSW,
|
|
||||||
LODSQ,
|
|
||||||
OUTAX,
|
|
||||||
RDPMC,
|
|
||||||
RDMSR,
|
|
||||||
RDTSC,
|
|
||||||
SCASW,
|
|
||||||
SCASQ,
|
|
||||||
STOSW,
|
|
||||||
STOSQ,
|
|
||||||
WRMSR,
|
|
||||||
XLATB,
|
|
||||||
ENTER,
|
|
||||||
CALL,
|
|
||||||
IN,
|
|
||||||
OUT,
|
|
||||||
JMP,
|
|
||||||
JO,
|
|
||||||
JNO,
|
|
||||||
JB,
|
|
||||||
JAE,
|
|
||||||
JE,
|
|
||||||
JNE,
|
|
||||||
JBE,
|
|
||||||
JA,
|
|
||||||
JS,
|
|
||||||
JNS,
|
|
||||||
JPE,
|
|
||||||
JPO,
|
|
||||||
JL,
|
|
||||||
JGE,
|
|
||||||
JLE,
|
|
||||||
JG,
|
|
||||||
MOV,
|
|
||||||
CMOVO,
|
|
||||||
CMOVNO,
|
|
||||||
CMOVB,
|
|
||||||
CMOVAE,
|
|
||||||
CMOVE,
|
|
||||||
CMOVNE,
|
|
||||||
CMOVBE,
|
|
||||||
CMOVA,
|
|
||||||
CMOVS,
|
|
||||||
CMOVNS,
|
|
||||||
CMOVPE,
|
|
||||||
CMOVPO,
|
|
||||||
CMOVL,
|
|
||||||
CMOVGE,
|
|
||||||
CMOVLE,
|
|
||||||
CMOVG,
|
|
||||||
PUSH,
|
|
||||||
POP,
|
|
||||||
BSWAP,
|
|
||||||
TEST,
|
|
||||||
RCL,
|
|
||||||
RCR,
|
|
||||||
ROL,
|
|
||||||
ROR,
|
|
||||||
SHL,
|
|
||||||
SHR,
|
|
||||||
SAL,
|
|
||||||
SAR,
|
|
||||||
REP,
|
|
||||||
REPE,
|
|
||||||
REPNE,
|
|
||||||
REPZ,
|
|
||||||
REPNZ,
|
|
||||||
LOOP,
|
|
||||||
LOOPE,
|
|
||||||
LOOPNE,
|
|
||||||
MOVBE,
|
|
||||||
XADD,
|
|
||||||
XCHG,
|
|
||||||
LEA,
|
|
||||||
POPCNT,
|
|
||||||
BSF,
|
|
||||||
BSR,
|
|
||||||
FADD,
|
|
||||||
FMUL,
|
|
||||||
FCOM,
|
|
||||||
FCOMP,
|
|
||||||
FSUB,
|
|
||||||
FSUBR,
|
|
||||||
FDIV,
|
|
||||||
FDIVR
|
|
||||||
};
|
};
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
GR0,
|
GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7,
|
||||||
GR1,
|
GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15
|
||||||
GR2,
|
|
||||||
GR3,
|
|
||||||
GR4,
|
|
||||||
GR5,
|
|
||||||
GR6,
|
|
||||||
GR7,
|
|
||||||
GR8,
|
|
||||||
GR9,
|
|
||||||
GR10,
|
|
||||||
GR11,
|
|
||||||
GR12,
|
|
||||||
GR13,
|
|
||||||
GR14,
|
|
||||||
GR15
|
|
||||||
};
|
};
|
||||||
|
|
||||||
extern unsigned int text_entry_point;
|
extern unsigned int text_entry_point;
|
||||||
|
Reference in New Issue
Block a user