119 lines
4.4 KiB
Markdown
119 lines
4.4 KiB
Markdown
# General
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## The following instructions are fully supported:
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```asm
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add, or, adc, sbb,
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and, sub, xor, cmp,
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inc, dec, not, neg,
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mul, imul, div, idiv,
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fadd, fmul, fcom, fcomp,
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fsub, fsubr, fdiv, fdivr,
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rol, ror, rcl, rcr,
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sal, shr, shl, sar,
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nop, retn, retf, leave,
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popf, pushf,
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syscall, cpuid, fnop, fchs,
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fabs, ftst, fxam, fld1,
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fldl2t, fldl2e, fldpi, fldlg2,
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fldln2, fldz, f2xm1, fyl2x,
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fptan, fpatan, fxtract, fprem1,
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fdecstp, fincstp, fprem, fyl2xp1,
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fsqrt, fsincos, frndint, fscale,
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fsin, fcos,
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enter, call, in, out,
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jmp, mov, pop, push,
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jo, jno, jb, jae,
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je, jne, jbe, ja,
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js, jns, jpe, jpo,
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jl, jge, jle, jg,
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cmovo, cmovno, cmovb, cmovae,
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cmove, cmovne, cmovbe, cmova,
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cmovs, cmovns, cmovpe, cmovpo,
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cmovl, cmovge, cmovle, cmovg,
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seto, setno, setb, setae,
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sete, setne, setbe, seta,
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sets, setns, setpe, setpo,
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setl, setge, setle, setg,
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bswap, bsf, bsr, loop,
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loope, loopne
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```
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## 2 argument instructions (t6)
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### add, or, adc, sbb, and, sub, xor, cmp;
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- REG REG // This means that arg1 can only be REG or MEM.
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- REG MEM // And arg2 can only be REG, MEM or IMM, but:
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- REG IMM // You can't use MEM as both arguments.
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- MEM REG // This limitation stems from x64 encoding.
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- MEM IMM // Hardware we use can't encode that.
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- REG or MEM can use D8 ... D64, any size.
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- IMM in this case must be maximum 32 bit.
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- Examples:
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```c
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add rax 0x11223344 // ADD D64 REG R0 IMM 0x11223344
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or ecx 0x11223344 // OR D32 REG R1 IMM 0x11223344
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adc dx 0x1122 // ADC D16 REG R2 IMM 0x1122
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sbb bl 0x11 // SBB D8 REG R3 IMM 0x11
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```
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## 1 argument instructions (t4)
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### inc, dec, not, neg, mul, imul, div, idiv;
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- REG
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- MEM
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- REG or MEM can use D8 ... D64, any size.
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- IMM can't be used with these instructions.
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- Examples:
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```c
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inc rsp // INC D64 REG R4
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dec ebp // DEC D32 REG R5
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not si // NOT D16 REG R6
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neg dil // NEG D8 REG R7
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```
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# Examples
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```c
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sysenter // SYSENTER
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sysexit // SYSEXIT
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syscall // SYSCALL
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sysret // SYSRET
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mov eax ebx // MOV D32 REG R0 REG R3
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mov eax [x] // MOV D32 REG R0 MEM 69
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mov eax 0x11223344 // MOV D32 REG R0 IMM 0x11223344
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mov [x] eax // MOV D32 MEM 69 REG R0
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mov [x] 0x11223344 // MOV D32 MEM 69 IMM 0x11223344
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mov eax x // MOV D32 REG R0 REL 69
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...
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u32 x = 420 // ASMDIRMEM 69 ASMDIRIMM D32 420
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```
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As for core instructions we must support, no matter what, here's the list:
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```
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mov <REG/MEM> <REG/MEM/IMM> -- immediate value can be up to 64 bits.
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add or adc sbb and sub xor cmp <REG/MEM> <REG/MEM/IMM> -- immediate value can be up to 32 bits.
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inc dec not neg mul imul div idiv <REG/MEM> -- no immediates allowed here.
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jmp jCC cmovCC <> <> -- conditional instructions, important!
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enter leave pop push -- stack focused instructions.
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sysenter sysexit syscall sysret -- kernel/system focused instructions.
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in out nop call bswap sal sar shr shl rol ror xchg loop -- ease-of-use focused instructions.
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```
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- Here is what's available to use, it's in the list below, there are 5 combinations, for 2 argument instructions.
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```
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ins REG REG -- mov, add, cmp, xor, and
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ins REG MEM -- ^
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ins REG IMM -- ^
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ins MEM REG -- ^
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ins MEM IMM -- ^
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ins REG -- inc, dec, not, div, mul
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ins MEM -- ^
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ins -- syscall, pause, hlt, ret, leave
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```
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